IE
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== Publications == | == Publications == | ||
− | M Ravishankar, J Eisenlohr, LN Pouchet, J Ramanujam, A Rountev, P Sadayappan, "Code generation for parallel execution of a class of irregular loops on distributed memory systems", Supercomputing 2012, Salt Lake City, UT, USA. [http://hpcrl.cse.ohio-state.edu/IEC/sc_12-ie.pdf link]. | + | M Ravishankar, J Eisenlohr, LN Pouchet, J Ramanujam, A Rountev, P Sadayappan, "Code generation for parallel execution of a class of irregular loops on distributed memory systems", Supercomputing 2012, Salt Lake City, UT, USA. [http://hpcrl.cse.ohio-state.edu/IEC/sc_12-ie.pdf link]. |
M Ravishankar, J Eisenlohr, LN Pouchet, J Ramanujam, A Rountev, P Sadayappan, "Automatic Parallelization of a Class of Irregular Loops for Distributed Memory Systems", [http://hpcrl.cse.ohio-state.edu/IEC/topc13.pdf link] to appear in ACM Transaction on Parallel Computing | M Ravishankar, J Eisenlohr, LN Pouchet, J Ramanujam, A Rountev, P Sadayappan, "Automatic Parallelization of a Class of Irregular Loops for Distributed Memory Systems", [http://hpcrl.cse.ohio-state.edu/IEC/topc13.pdf link] to appear in ACM Transaction on Parallel Computing |
Revision as of 05:26, 12 September 2014
Contents |
Overview
The Inspector/Executor Compiler (IEC) implements a source-to-source transformation scheme for generating distributed memory code for irregular parallel loops. Loops might also contain dependences through associative and commutative reduction operators. Details of code-generation scheme described in these papers in Supercomputing 2012 and in TOPC (to be published soon)
Publications
M Ravishankar, J Eisenlohr, LN Pouchet, J Ramanujam, A Rountev, P Sadayappan, "Code generation for parallel execution of a class of irregular loops on distributed memory systems", Supercomputing 2012, Salt Lake City, UT, USA. link.
M Ravishankar, J Eisenlohr, LN Pouchet, J Ramanujam, A Rountev, P Sadayappan, "Automatic Parallelization of a Class of Irregular Loops for Distributed Memory Systems", link to appear in ACM Transaction on Parallel Computing
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Installation
Please follow the instructions in the README