SDSL

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Overview

The stencil domain specific language (SDSL) is a domain-specific language for expressing stencil computations. SDSL is loosely based on the RNPL and SNPL languages used for rapid prototyping of partial differential equation solvers, although the resemblance is mostly cosmetic and no code is shared between the projects.

The purpose of SDSL is to provide a programming language that allows for the specification of non-trivial stencil computations in a form that enables the generation of high-performance implementations that can be obtained in a performance-portable manner on multiple platforms.

Currently, SDSL can be translated into codes for CPU and GPU execution. CPU code is generated by a backend that produces C code with affine structure. The generated affine C code is C99 compliant and is meant to be processed further by polyhedral optimization tools such as PoCC and PolyOpt/C. GPU code generation is performed by the OverTile backend. Generated code is in CUDA C. OverTile generated code can be autotuned using a simple script included with the sdslc distribution.

People

Publications

  • T. Henretty, J. Holewinski, R. Veras, F. Franchetti, L.N. Pouchet, J. Ramanujam, A. Rountev, P. Sadayappan. “A Domain-Specific Language and Compiler for Stencil Computations on Short-Vector SIMD and GPU Architectures,” Compilers for Parallel Computing Workshop (CPC), July 2013. link
  • T. Henretty, R. Veras, F. Franchetti, L.N. Pouchet, J. Ramanujam, P. Sadayappan. “A Stencil Compiler for Short-Vector SIMD Architectures,” International Conference on Supercomputing (ICS), June 2013. link
  • T. Henretty, J. Holewinski, N. Sedaghati, L.N. Pouchet, A. Rountev, P. Sadayappan. “Stencil Domain Specific Language (SDSL) User Guide,” Ohio State University Technical Report OSU-CISRC-4/13-TR09, 2013. link
  • J. Holewinski, L.N. Pouchet, A. Rountev, P. Sadayappan. “High-Performance Code Generation for Stencil Computations on GPU Architectures,” International Conference on Supercomputing (ICS), June 2012.
  • T. Henretty, K. Stock, L.N. Pouchet, F. Franchetti, J. Ramanujam and P. Sadayappan. "Data Layout Transformation for Stencil Computations on Short-Vector SIMD Architectures," International Conference on Compiler Construction (CC), March 2011. link

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Acknowledgements

This work was supported in part by the U.S. National Science Foundation through awards 0811457, 0904549, 0926127, 1059417 and 1321147, by the U.S. Department of Energy through award DE-SC0008844.

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