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Overview :
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== Overview ==
  
 
The Inspector/Executor Compiler (IEC) implements a source-to-source transformation scheme for generating distributed memory code for irregular parallel loops. Loops might also contain dependences through associative and commutative reduction operators (current implementation supports only '+=' ). Details of code-generation scheme described in these papers in [http://dl.acm.org/citation.cfm?id=2389094 Supercomputing 2012] and in TOPC (to be published soon)
 
The Inspector/Executor Compiler (IEC) implements a source-to-source transformation scheme for generating distributed memory code for irregular parallel loops. Loops might also contain dependences through associative and commutative reduction operators (current implementation supports only '+=' ). Details of code-generation scheme described in these papers in [http://dl.acm.org/citation.cfm?id=2389094 Supercomputing 2012] and in TOPC (to be published soon)
  
Download :
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== Publications ==
  
Download the Inspector/Executor Compiler here
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M Ravishankar, J Eisenlohr, LN Pouchet, J Ramanujam, A Rountev, P Sadayappan, "Code generation for parallel execution of a class of irregular loops on distributed memory systems", Supercomputing 2012, Salt Lake City, UT, USA. [http://dl.acm.org/citation.cfm?id=2389094 link]
  
Installation :
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M Ravishankar, J Eisenlohr, LN Pouchet, J Ramanujam, A Rountev, P Sadayappan, "Automatic Parallelization of a Class of Irregular Loops for Distributed Memory Systems", to appear in ACM Transaction on Parallel Computing
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== Download ==
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* [http://hpcrl.cse.ohio-state.edu/IEC/IEC.tar.gz IEC 0.1]
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** [http://hpcrl.cse.ohio-state.edu/IEC/README REAMDE]
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== Installation ==
  
 
Please follow the instructions in the README
 
Please follow the instructions in the README

Revision as of 23:12, 6 September 2014

Contents

Overview

The Inspector/Executor Compiler (IEC) implements a source-to-source transformation scheme for generating distributed memory code for irregular parallel loops. Loops might also contain dependences through associative and commutative reduction operators (current implementation supports only '+=' ). Details of code-generation scheme described in these papers in Supercomputing 2012 and in TOPC (to be published soon)

Publications

M Ravishankar, J Eisenlohr, LN Pouchet, J Ramanujam, A Rountev, P Sadayappan, "Code generation for parallel execution of a class of irregular loops on distributed memory systems", Supercomputing 2012, Salt Lake City, UT, USA. link

M Ravishankar, J Eisenlohr, LN Pouchet, J Ramanujam, A Rountev, P Sadayappan, "Automatic Parallelization of a Class of Irregular Loops for Distributed Memory Systems", to appear in ACM Transaction on Parallel Computing


Download

Installation

Please follow the instructions in the README

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