IE

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== Overview ==
 
== Overview ==
  
The Inspector/Executor Compiler (IEC) implements a source-to-source transformation scheme for generating distributed memory code for irregular parallel loops. Loops might also contain dependences through associative and commutative reduction operators. Details of code-generation scheme described in these papers in [http://dl.acm.org/citation.cfm?id=2389094 Supercomputing 2012] and in TOPC (to be published soon)
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The Inspector/Executor Compiler (IEC) implements a source-to-source transformation scheme for generating distributed memory code for irregular parallel loops. Loops might also contain dependences through associative and commutative reduction operators. Details of code-generation scheme described in the publications listed below.
  
 
== Publications ==
 
== Publications ==
  
M Ravishankar, J Eisenlohr, LN Pouchet, J Ramanujam, A Rountev, P Sadayappan, "Code generation for parallel execution of a class of irregular loops on distributed memory systems", Supercomputing 2012, Salt Lake City, UT, USA. [http://hpcrl.cse.ohio-state.edu/IEC/topc13.pdf link]. [http://hpcrl.cse.ohio-state.edu/IEC/tr14.pdf Technical Report]
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M. Ravishankar, R. Dathathri, V. Elango, L.-N. Pouchet, J. Ramanujam, A. Rountev, and P. Sadayappan, "Distributed Memory Code Generation for Mixed Irregular/Regular Computations", ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), 2015. [http://hpcrl.cse.ohio-state.edu/IEC/ppopp15_ie.pdf link].
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Example of generated code: [http://hpcrl.cse.ohio-state.edu/IEC/example.pdf link].
  
M Ravishankar, J Eisenlohr, LN Pouchet, J Ramanujam, A Rountev, P Sadayappan, "Automatic Parallelization of a Class of Irregular Loops for Distributed Memory Systems", [http://hpcrl.cse.ohio-state.edu/IEC/topc13.pdf link] to appear in ACM Transaction on Parallel Computing
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M. Ravishankar, J. Eisenlohr, L.-N. Pouchet, J. Ramanujam, A. Rountev, and P Sadayappan, "Automatic Parallelization of a Class of Irregular Loops for Distributed Memory Systems", ACM Transaction on Parallel Computing (TOPC), Sept 2014 [http://hpcrl.cse.ohio-state.edu/IEC/topc13.pdf link].
  
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M. Ravishankar, J. Eisenlohr, L.-N. Pouchet, J. Ramanujam, A. Rountev, and P. Sadayappan, "Code Generation for Parallel Execution of a Class of Irregular Loops on Distributed Memory Systems", Supercomputing (SC), 2012. [http://hpcrl.cse.ohio-state.edu/IEC/sc_12-ie.pdf link].
  
 
== Download ==
 
== Download ==
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Please follow the instructions in the README
 
Please follow the instructions in the README
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== Acknowledgements ==
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This software is based upon work supported by the U. S. National Science Foundation under grants 0811457, 0904549, 0926127, 0926687, 1059417, 1321147 and 1404995 and by the U.S. Department of Energy under grant DE-SC0008844. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the authors and do not necessarily reflect the views of the National Science Foundation, the Department of Energy, or The Ohio State University.

Latest revision as of 17:15, 4 August 2015

Contents

Overview

The Inspector/Executor Compiler (IEC) implements a source-to-source transformation scheme for generating distributed memory code for irregular parallel loops. Loops might also contain dependences through associative and commutative reduction operators. Details of code-generation scheme described in the publications listed below.

Publications

M. Ravishankar, R. Dathathri, V. Elango, L.-N. Pouchet, J. Ramanujam, A. Rountev, and P. Sadayappan, "Distributed Memory Code Generation for Mixed Irregular/Regular Computations", ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), 2015. link. Example of generated code: link.

M. Ravishankar, J. Eisenlohr, L.-N. Pouchet, J. Ramanujam, A. Rountev, and P Sadayappan, "Automatic Parallelization of a Class of Irregular Loops for Distributed Memory Systems", ACM Transaction on Parallel Computing (TOPC), Sept 2014 link.

M. Ravishankar, J. Eisenlohr, L.-N. Pouchet, J. Ramanujam, A. Rountev, and P. Sadayappan, "Code Generation for Parallel Execution of a Class of Irregular Loops on Distributed Memory Systems", Supercomputing (SC), 2012. link.

Download

Installation

Please follow the instructions in the README

Acknowledgements

This software is based upon work supported by the U. S. National Science Foundation under grants 0811457, 0904549, 0926127, 0926687, 1059417, 1321147 and 1404995 and by the U.S. Department of Energy under grant DE-SC0008844. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the authors and do not necessarily reflect the views of the National Science Foundation, the Department of Energy, or The Ohio State University.

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