TCE-IP

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=== Introduction ===
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The IP-TCE library is a set of C functions designed to provide
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high-performance array index permutation (index sorting), an important
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group of kernels used in many scientific applications and compilation
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techniques. The generation of the library code combines analytical and
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empirical approaches. The details of how to generate the efficient 2-D IP
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(Matrix Transposition) code can be found in [1]. For high-dimensional arrays,
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with challenges such as high indexing costs and short dimensions, we employ
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optimizations such as restricting code versions, using one-level tiling and
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generating indexing code to achieve high performance without code size
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explosion.
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The source code we provide does index permutation on 2-D,4-D and 6-D
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64-bit floating point arrays on IA-32 machines. Except for the 2-D functions that
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have more complicated optimizations than the others, the library employs SSE2
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instructions when the fastest varying dimensions of source and destination
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arrays are multiples of vector sizes in elements, otherwise a scalar version
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is chosen. The user should be able to modify our code to get IP code working for
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other dimension numbers.
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The IP-TCE library implements two variants of index permutation. One variant
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implements B = factor * Permute(A, permutation) and the other one is the
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accumulative version B = B + factor * Permute(A, permutation). Doing so makes
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our code compatible with the index permutation routines in nwchem/tce. We have
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been able to plug our code into nwchem/tce and obtained overall performance
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improvements ranging from 74% to 253% with different methods and inputs.
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=== Compilation ===
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The library code can be compiled by either the Intel C compiler or the GNU C
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compiler. We used icc 10.1 and gcc 4.1.2 when testing the code. If other
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compilers such as pgcc is used, the user is responsible for finding the
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alignment directives used by the compiler and changing the library code
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correspondingly.
 +
 
 +
=== Library Usage ===
 +
The interface of the IP-TCE library is compatible with the index permutation
 +
routines in nwchem/tce and is mainly for Fortran used. For example,
 +
the prototype of the 4-D non-accumulative permutation routine is:
 +
 
 +
                  tce_sort_4_(double* unsorted,double* sorted,
 +
                              int* a_in, int* b_in, int* c_in, int* d_in,
 +
                              int* i_in, int* j_in, int* k_in, int* l_in,
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                              double* factor_in)
 +
 
 +
Where all the arguments are pointers and function names are in the lowercase
 +
and end with "_". If needed,  the user can write a wrapper or directly modify
 +
the function (which is actually a wrapper to the SIMD and scalar IP functions)
 +
to obtain a desired interface.
 +
 
 +
=== Contact Info ===
 +
Please contact Qingda Lu(luq@cse.ohio-state.edu) for questions.
 +
 
 +
=== Reference ===
 +
[1] Qingda Lu, Sriram Krishnamoorthy, P. Sadayappan: Combining analytical and
 +
empirical approaches in tuning matrix transposition. 15th International
 +
Conference on Parallel Architecture and Compilation Techniques(PACT 2006):233-242

Latest revision as of 23:34, 20 February 2009

Contents

Introduction

The IP-TCE library is a set of C functions designed to provide high-performance array index permutation (index sorting), an important group of kernels used in many scientific applications and compilation techniques. The generation of the library code combines analytical and empirical approaches. The details of how to generate the efficient 2-D IP (Matrix Transposition) code can be found in [1]. For high-dimensional arrays, with challenges such as high indexing costs and short dimensions, we employ optimizations such as restricting code versions, using one-level tiling and generating indexing code to achieve high performance without code size explosion.

The source code we provide does index permutation on 2-D,4-D and 6-D 64-bit floating point arrays on IA-32 machines. Except for the 2-D functions that have more complicated optimizations than the others, the library employs SSE2 instructions when the fastest varying dimensions of source and destination arrays are multiples of vector sizes in elements, otherwise a scalar version is chosen. The user should be able to modify our code to get IP code working for other dimension numbers.

The IP-TCE library implements two variants of index permutation. One variant implements B = factor * Permute(A, permutation) and the other one is the accumulative version B = B + factor * Permute(A, permutation). Doing so makes our code compatible with the index permutation routines in nwchem/tce. We have been able to plug our code into nwchem/tce and obtained overall performance improvements ranging from 74% to 253% with different methods and inputs.

Compilation

The library code can be compiled by either the Intel C compiler or the GNU C compiler. We used icc 10.1 and gcc 4.1.2 when testing the code. If other compilers such as pgcc is used, the user is responsible for finding the alignment directives used by the compiler and changing the library code correspondingly.

Library Usage

The interface of the IP-TCE library is compatible with the index permutation routines in nwchem/tce and is mainly for Fortran used. For example, the prototype of the 4-D non-accumulative permutation routine is:

                  tce_sort_4_(double* unsorted,double* sorted,
                              int* a_in, int* b_in, int* c_in, int* d_in,
                              int* i_in, int* j_in, int* k_in, int* l_in,
                              double* factor_in)

Where all the arguments are pointers and function names are in the lowercase and end with "_". If needed, the user can write a wrapper or directly modify the function (which is actually a wrapper to the SIMD and scalar IP functions) to obtain a desired interface.

Contact Info

Please contact Qingda Lu(luq@cse.ohio-state.edu) for questions.

Reference

[1] Qingda Lu, Sriram Krishnamoorthy, P. Sadayappan: Combining analytical and empirical approaches in tuning matrix transposition. 15th International Conference on Parallel Architecture and Compilation Techniques(PACT 2006):233-242

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